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DATE
2008
IEEE
124views Hardware» more  DATE 2008»
16 years 1 months ago
Automated Testability Enhancements for Logic Brick Libraries
Circuit fabrics composed of highly regular structures, called logic bricks, have been described recently for improving yield. An automated logic brick design flow based on a SAT ...
Jason G. Brown, Brian Taylor, Ronald D. Blanton, L...
DATE
2008
IEEE
78views Hardware» more  DATE 2008»
16 years 1 months ago
Transistor-Specific Delay Modeling for SSTA
SSTA has received a considerable amount of attention in recent years. However, it is a general rule that any approach can only be as accurate as the underlying models. Thus, varia...
Brian Cline, Kaviraj Chopra, David Blaauw, Andres ...
DATE
2008
IEEE
91views Hardware» more  DATE 2008»
16 years 1 months ago
Integrated approach to energy harvester mixed technology modelling and performance optimisation
This paper presents an integrated approach to energy harvester modelling and performance optimisation where the complete mixed physical-domain energy harvester system (micro gener...
Leran Wang, Tom J. Kazmierski, Bashir M. Al-Hashim...
DSN
2008
IEEE
16 years 1 months ago
Towards an understanding of anti-virtualization and anti-debugging behavior in modern malware
Many threats that plague today’s networks (e.g., phishing, botnets, denial of service attacks) are enabled by a complex ecosystem of attack programs commonly called malware. To ...
Xu Chen, Jonathon Andersen, Zhuoqing Morley Mao, M...
FCCM
2008
IEEE
205views VLSI» more  FCCM 2008»
16 years 1 months ago
Credit Risk Modelling using Hardware Accelerated Monte-Carlo Simulation
The recent turmoil in global credit markets has demonstrated the need for advanced modelling of credit risk, which can take into account the effects of changing economic condition...
David B. Thomas, Wayne Luk