17 search results - page 2 / 4 » Realizable reduction for RC interconnect circuits |
207
Voted
ISQED
2005
IEEE
16 years 1 months ago
2005
IEEE
This paper presents a novel compact passive modeling technique for high-performance RF passives and interconnects modeled as high-order RLCM circuits. The new method is based on a...
221
Voted
DAC
2003
ACM
16 years 20 days ago
2003
ACM
Reduction of an extracted netlist is an important pre-processing step for techniques such as model order reduction in the design and analysis of VLSI circuits. This paper describe...
174
Voted
ISCAS
2005
IEEE
16 years 1 months ago
2005
IEEE
Inductance effects of on-chip interconnects have become more and more significant in today’s high-speed digital circuits, especially for global interconnects such as signal buse...
214
Voted
DAC
2005
ACM
15 years 9 months ago
2005
ACM
Capturing RLCK circuit responses accurately with existing model order reduction (MOR) techniques is very expensive. Direct metrics for fast analysis of RC circuits exist but there...
165
Voted
ISCAS
2003
IEEE
16 years 21 days ago
2003
IEEE
High frequency digital LSIs usually consist of many subcircuits coupled with multi-conductor interconnects embedded in the substrate. They sometimes cause serious problems of the ...