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DATE
2010
IEEE
113views Hardware» more  DATE 2010»
15 years 11 months ago
PM-COSYN: PE and memory co-synthesis for MPSoCs
—Multi-Processor System-on-Chips (MPSoCs) exploit task-level parallelism to achieve high computation throughput, but concurrent memory accesses from multiple PEs may cause memory...
Yi-Jung Chen, Chia-Lin Yang, Po-Han Wang
ISCA
2002
IEEE
91views Hardware» more  ISCA 2002»
15 years 11 months ago
Slack: Maximizing Performance Under Technological Constraints
Many emerging processor microarchitectures seek to manage technological constraints (e.g., wire delay, power, and circuit complexity) by resorting to nonuniform designs that provi...
Brian A. Fields, Rastislav Bodík, Mark D. H...
ESEM
2007
ACM
15 years 10 months ago
Value-Based Empirical Research Plan Evaluation
Empirical studies are crucial to gain evidence on the effects of software engineering methods and tools in defined contexts. However, empirical studies can be costly and thus need...
Stefan Biffl, Dietmar Winkler
PERVASIVE
2010
Springer
15 years 8 months ago
Supporting Energy-Efficient Uploading Strategies for Continuous Sensing Applications on Mobile Phones
Abstract. Continuous sensing applications (e.g., mobile social networking applications) are appearing on new sensor-enabled mobile phones such as the Apple iPhone, Nokia and Androi...
Mirco Musolesi, Mattia Piraccini, Kristof Fodor, A...
ASAP
2007
IEEE
112views Hardware» more  ASAP 2007»
15 years 8 months ago
Scheduling Register-Allocated Codes in User-Guided High-Level Synthesis
In high-level synthesis, as for compilers, an important question is when register assignment should take place. Unlike compilers for which the processor architecture is given, syn...
Alain Darte, C. Quinson