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GLVLSI
2006
IEEE
152views VLSI» more  GLVLSI 2006»
16 years 27 days ago
2 Gbps SerDes design based on IBM Cu-11 (130nm) standard cell technology
This paper introduces a standard cell based design for a Serializer and Deserializer (SerDes) communication link. The proposed design is area, power and design time efficient as c...
Rashed Zafar Bhatti, Monty Denneau, Jeff Draper
INFOCOM
2006
IEEE
16 years 26 days ago
Designing Low Cost Networks with Short Routes and Low Congestion
— We design network topologies and routing strategies which optimize several measures simultaneously: low cost, small routing diameter , bounded degree and low congestion. This s...
Van Nguyen, Charles U. Martel
BMCBI
2008
78views more  BMCBI 2008»
15 years 7 months ago
Evaluation of time profile reconstruction from complex two-color microarray designs
Background: As an alternative to the frequently used "reference design" for two-channel microarrays, other designs have been proposed. These designs have been shown to b...
Ana C. Fierro, Raphael Thuret, Kristof Engelen, Gi...
KDD
2008
ACM
174views Data Mining» more  KDD 2008»
16 years 7 months ago
Automatic identification of quasi-experimental designs for discovering causal knowledge
Researchers in the social and behavioral sciences routinely rely on quasi-experimental designs to discover knowledge from large databases. Quasi-experimental designs (QEDs) exploi...
David D. Jensen, Andrew S. Fast, Brian J. Taylor, ...
QEST
2010
IEEE
15 years 4 months ago
Automatic Compositional Reasoning for Probabilistic Model Checking of Hardware Designs
Adaptive techniques like voltage and frequency scaling, process variations and the randomness of input data contribute signi cantly to the statistical aspect of contemporary hardwa...
Jayanand Asok Kumar, Shobha Vasudevan