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CODES
2004
IEEE
15 years 10 months ago
Automatic synthesis of system on chip multiprocessor architectures for process networks
In this paper, we present an approach for automatic synthesis of System on Chip (SoC) multiprocessor architectures for applications expressed as process networks. Our approach is ...
Basant Kumar Dwivedi, Anshul Kumar, M. Balakrishna...
DATE
2004
IEEE
123views Hardware» more  DATE 2004»
15 years 10 months ago
On Concurrent Error Detection with Bounded Latency in FSMs
We discuss the problem of concurrent error detection (CED) with bounded latency in finite state machines (FSMs). The objective of this approach is to reduce the overhead of CED, a...
Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris
CANS
2006
Springer
129views Cryptology» more  CANS 2006»
15 years 10 months ago
Side Channel Attacks and Countermeasures on Pairing Based Cryptosystems over Binary Fields
Pairings on elliptic curves have been used as cryptographic primitives for the development of new applications such as identity based schemes. For the practical applications, it is...
Tae-Hyun Kim, Tsuyoshi Takagi, Dong-Guk Han, Ho Wo...
CG
2006
Springer
15 years 10 months ago
Efficient Selectivity and Backup Operators in Monte-Carlo Tree Search
Monte-Carlo evaluation consists in estimating a position by averaging the outcome of several random continuations, and can serve as an evaluation function at the leaves of a min-ma...
Rémi Coulom
EVOW
2006
Springer
15 years 10 months ago
Continuous-Time Recurrent Neural Networks for Generative and Interactive Musical Performance
This paper describes an ongoing exploration into the use of Continuous-Time Recurrent Neural Networks (CTRNNs) as generative and interactive performance tools, and using Genetic Al...
Oliver Bown, Sebastian Lexer