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FPL
2007
Springer
99views Hardware» more  FPL 2007»
15 years 10 months ago
Disjoint Pattern Enumeration for Custom Instructions Identification
Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. These custom instructions are selected through an analys...
Pan Yu, Tulika Mitra
BMVC
2010
15 years 4 months ago
Graph-based Analysis of Textured Images for Hierarchical Segmentation
The Texture Fragmentation and Reconstruction (TFR) algorithm has been recently introduced [9] to address the problem of image segmentation by textural properties, based on a suita...
Raffaele Gaetano, Giuseppe Scarpa, Tamás Sz...
FASE
2012
Springer
14 years 2 months ago
Integration Testing of Software Product Lines Using Compositional Symbolic Execution
Software product lines are families of products defined by feature commonality and variability, with a well-managed asset base. Recent work in testing of software product lines ha...
Jiangfan Shi, Myra B. Cohen, Matthew B. Dwyer
ISPD
2012
ACM
283views Hardware» more  ISPD 2012»
14 years 2 months ago
Low-power gated bus synthesis for 3d ic via rectilinear shortest-path steiner graph
In this paper, we propose a new approach for gated bus synthesis [16] with minimum wire capacitance per transaction in three-dimensional (3D) ICs. The 3D IC technology connects di...
Chung-Kuan Cheng, Peng Du, Andrew B. Kahng, Shih-H...
DAC
2008
ACM
16 years 7 months ago
Multithreaded simulation for synchronous dataflow graphs
Synchronous dataflow (SDF) has been successfully used in design tools for system-level simulation of wireless communication systems. Modern wireless communication standards involv...
Chia-Jui Hsu, José Luis Pino, Shuvra S. Bha...