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FPL
2007
Springer
98views Hardware» more  FPL 2007»
15 years 8 months ago
Module Graph Merging and Placement to Reduce Reconfiguration Overheads in Paged FPGA Devices
Reconfiguration time in dynamically-reconfigurable modular systems can severely limit application run-time compared to the critical path delay. In this paper we present a novel ...
Shannon Koh, Oliver Diessel
130
Voted
IJCAI
2003
15 years 8 months ago
Automated Verification: Graphs, Logic, and Automata
Automated verification is one of the most success­ ful applications of automated reasoning in com­ puter science. In automated verification one uses algorithmic techniques to es...
Moshe Y. Vardi
ENTCS
2007
104views more  ENTCS 2007»
15 years 6 months ago
Lazy Context Cloning for Non-Deterministic Graph Rewriting
We define a rewrite strategy for a class of non-confluent constructor-based term graph rewriting systems and discuss its correctness. Our strategy and its extension to narrowing...
Sergio Antoy, Daniel W. Brown, Su-Hui Chiang
ATMOS
2007
15 years 8 months ago
Maintenance of Multi-level Overlay Graphs for Timetable Queries
In railways systems the timetable is typically represented as a weighted digraph on which itinerary queries are answered by shortest path algorithms, usually running Dijkstra’s a...
Francesco Bruera, Serafino Cicerone, Gianlorenzo D...
GD
2008
Springer
15 years 7 months ago
Graph Drawing for Security Visualization
Abstract. As the number of devices connected to the internet continues to grow rapidly and software systems are being increasingly deployed on the web, security and privacy have be...
Roberto Tamassia, Bernardo Palazzi, Charalampos Pa...