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ICRA
2000
IEEE
180views Robotics» more  ICRA 2000»
15 years 10 months ago
Interactive Motion Planning Using Hardware-Accelerated Computation of Generalized Voronoi Diagrams
We present techniques for fast motion planning by using discrete approximations of generalized Voronoi diagrams, computed with graphics hardware. Approaches based on this diagram ...
Kenneth E. Hoff III, Tim Culver, John Keyser, Ming...
ISSS
2000
IEEE
127views Hardware» more  ISSS 2000»
15 years 10 months ago
Lower Bound Estimation for Low Power High-Level Synthesis
This paper addresses the problem of estimating lower bounds on the power consumption in scheduled data flow graphs with a fixed number of allocated resources prior to binding. T...
Lars Kruse, Eike Schmidt, Gerd Jochens, Ansgar Sta...
LICS
2000
IEEE
15 years 10 months ago
Virtual Symmetry Reduction
We provide a general method for ameliorating state explosion via symmetry reduction in certain asymmetric systems, such as systems with many similar, but not identical, processes....
E. Allen Emerson, John Havlicek, Richard J. Trefle...
ICCAD
1999
IEEE
80views Hardware» more  ICCAD 1999»
15 years 10 months ago
What is the cost of delay insensitivity?
Deep submicron technology calls for new design techniques, in which wire and gate delays are accounted to have equal or nearly equal effect on circuit behaviour. Asynchronous spee...
Hiroshi Saito, Alex Kondratyev, Jordi Cortadella, ...
ICPP
1999
IEEE
15 years 10 months ago
A Framework for Interprocedural Locality Optimization Using Both Loop and Data Layout Transformations
There has been much work recently on improving the locality performance of loop nests in scientific programs through the use of loop as well as data layout optimizations. However,...
Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanuja...
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