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DAC
1997
ACM
15 years 10 months ago
Wire Segmenting for Improved Buffer Insertion
Buffer insertion seeks to place buffers on the wires of a signal net to minimize delay. Van Ginneken [14] proposed an optimal dynamic programming solution (with extensions propose...
Charles J. Alpert, Anirudh Devgan
GLVLSI
1996
IEEE
125views VLSI» more  GLVLSI 1996»
15 years 10 months ago
Performance-Driven Interconnect Global Routing
In this paper, we propose a global routing algorithm for multi-layer building-block layouts. The algorithm is based on successive ripup and rerouting while satisfying edge capacit...
Dongsheng Wang, Ernest S. Kuh
ICCAD
1996
IEEE
112views Hardware» more  ICCAD 1996»
15 years 10 months ago
GRASP - a new search algorithm for satisfiability
This paper introduces GRASP (Generic seaRch Algorithm for the Satisfiability Problem), an integrated algorithmic framework for SAT that unifies several previously proposed searchp...
João P. Marques Silva, Karem A. Sakallah
ASPDAC
2007
ACM
107views Hardware» more  ASPDAC 2007»
15 years 10 months ago
A Technique to Reduce Peak Current and Average Power Dissipation in Scan Designs by Limited Capture
Abstract-- In this paper, a technique that can efficiently reduce peak and average switching activity during test application is proposed. The proposed method does not require any ...
Seongmoon Wang, Wenlong Wei
ICCAD
1995
IEEE
113views Hardware» more  ICCAD 1995»
15 years 10 months ago
Logic decomposition during technology mapping
—A problem in technology mapping is that the quality of the final implementation depends significantly on the initially provided circuit structure. This problem is critical, es...
Eric Lehman, Yosinori Watanabe, Joel Grodstein, He...