1304 search results - page 135 / 261 » RTOS Modeling for System Level Design |
126
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ICC
2007
IEEE
16 years 19 days ago
2007
IEEE
– Recent wireless measurement studies have revealed the presence of high-order memory in wireless bit-error channels. However, most wireless studies continue to employ the memory...
143
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ISQED
2009
IEEE
16 years 1 months ago
2009
IEEE
Electrical Modeling for High Bandwidth IO Link Chirayu Amin, Chandramouli Kashyap ¬ Intel Corp., Hillsboro, OR Prateek Bhansali ¬ Univ. of Minnesota, Mi...
152
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HICSS
2005
IEEE
15 years 12 months ago
2005
IEEE
This paper presents RDSS, a Resource Area Network (RAN)-based Distributed Storage System, which is designed for high scalability, long-term reliability, and operational efficiency...
159
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ISQED
2002
IEEE
15 years 11 months ago
2002
IEEE
Critical systems like pace-makers, defibrillators, wearable computers and other electronic gadgets have to be designed not only for reliability but also for ultra-low power consu...
198
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DAC
2003
ACM
16 years 7 months ago
2003
ACM
Widespread adoption of reconfigurable devices requires system level synthesis techniques to take an application written in a high level language and map it to the reconfigurable d...