Sciweavers

5762 search results - page 972 / 1153
» R-tree: A Hardware Implementation
Sort
View
DAC
2006
ACM
16 years 17 days ago
Use of C/C++ models for architecture exploration and verification of DSPs
Architectural decisions for DSP modules are often analyzed using high level C models. Such high-level explorations allow early examination of the algorithms and the architectural ...
David Brier, Raj S. Mitra
ISLPED
2006
ACM
100views Hardware» more  ISLPED 2006»
16 years 16 days ago
Selective writeback: exploiting transient values for energy-efficiency and performance
Today’s superscalar microprocessors use large, heavily-ported physical register files (RFs) to increase the instruction throughput. The high complexity and power dissipation of ...
Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev,...
ISLPED
2006
ACM
105views Hardware» more  ISLPED 2006»
16 years 16 days ago
Reducing power through compiler-directed barrier synchronization elimination
Interprocessor synchronization, while extremely important for ensuring execution correctness, can be very costly in terms of both power and performance overheads. Unfortunately, m...
Mahmut T. Kandemir, Seung Woo Son
ISLPED
2006
ACM
73views Hardware» more  ISLPED 2006»
16 years 16 days ago
Substituting associative load queue with simple hash tables in out-of-order microprocessors
Buffering more in-flight instructions in an out-of-order microprocessor is a straightforward and effective method to help tolerate the long latencies generally associated with ...
Alok Garg, Fernando Castro, Michael C. Huang, Dani...
NETGAMES
2006
ACM
16 years 16 days ago
On the support for heterogeneity in networked virtual environment
This paper presents our ongoing research activity to design and implement a framework for an networked virtual environment (NVE) that efficiently supports both hardware and softwa...
Hiroshi Fujinoki