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CCECE
2006
IEEE
16 years 23 days ago
FPGA-Based SAT Solver
Several approaches have been proposed to accelerate the NP-complete Boolean Satisfiability problem (SAT) using reconfigurable computing. We present an FPGA based clause evaluator,...
Mona Safar, M. Watheq El-Kharashi, Ashraf Salem
ICNP
2006
IEEE
16 years 23 days ago
Rigorous Protocol Design in Practice: An Optical Packet-Switch MAC in HOL
— This paper reports on an experiment in network protocol design: we use novel rigorous techniques in the design process of a new protocol, in a close collaboration between syste...
Adam Biltcliffe, Michael Dales, Sam Jansen, Tom Ri...
IEEEPACT
2006
IEEE
16 years 22 days ago
Branch predictor guided instruction decoding
Fast instruction decoding is a challenge for the design of CISC microprocessors. A well-known solution to overcome this problem is using a trace cache. It stores and fetches alrea...
Oliverio J. Santana, Ayose Falcón, Alex Ram...
IPPS
2006
IEEE
16 years 22 days ago
Parallel ICA methods for EEG neuroimaging
HiPerSAT, a C++ library and tools, processes EEG data sets with ICA (Independent Component Analysis) methods. HiPerSAT uses BLAS, LAPACK, MPI and OpenMP to achieve a high performa...
D. B. Keith, C. C. Hoge, Robert M. Frank, Allen D....
IPPS
2006
IEEE
16 years 22 days ago
Collective operations in NEC's high-performance MPI libraries
We give an overview of the algorithms and implementations in the high-performance MPI libraries MPI/SX and MPI/ES of some of the most important collective operations of MPI (the M...
Hubert Ritzdorf, Jesper Larsson Träff