Sciweavers

5762 search results - page 854 / 1153
» R-tree: A Hardware Implementation
Sort
View
SC
1995
ACM
15 years 10 months ago
Index Array Flattening Through Program Transformation
This paper presents techniques for compiling loops with complex, indirect array accesses into loops whose array references have at most one level of indirection. The transformatio...
Raja Das, Paul Havlak, Joel H. Saltz, Ken Kennedy
ASPLOS
1991
ACM
15 years 10 months ago
LimitLESS Directories: A Scalable Cache Coherence Scheme
Caches enhance the performance of multiprocessors by reducing network trac and average memory access latency. However, cache-based systems must address the problem of cache coher...
David Chaiken, John Kubiatowicz, Anant Agarwal
PDIS
1991
IEEE
15 years 10 months ago
Practical Prefetching Techniques for Parallel File Systems
Improvements in the processing speed of multiprocessors are outpacing improvements in the speed of disk hardware. Parallel disk I/O subsystems have been proposed as one way to clo...
David Kotz, Carla Schlatter Ellis
ESORICS
2008
Springer
15 years 8 months ago
CPU Bugs, CPU Backdoors and Consequences on Security
In this paper, we present the security implications of x86 processor bugs or backdoors on operating systems and virtual machine monitors. We will not try to determine whether the b...
Loïc Duflot
EUROPAR
2008
Springer
15 years 8 months ago
Data Mining Algorithms on the Cell Broadband Engine
The Cell Broadband Engine (CBE) is a new heterogeneous multi-core processor from IBM, Sony and Toshiba, and provides the potential to achieve an impressive level of performance for...
Rubing Duan, Alfred Strey