Sciweavers

5762 search results - page 833 / 1153
» R-tree: A Hardware Implementation
Sort
View
FPL
2005
Springer
107views Hardware» more  FPL 2005»
16 years 9 days ago
Programmable Numerical Function Generators: Architectures and Synthesis Method
This paper presents an architecture and a synthesis method for programmable numerical function generators of trigonometric functions, logarithm functions, square root, reciprocal,...
Tsutomu Sasao, Shinobu Nagayama, Jon T. Butler
FPL
2005
Springer
115views Hardware» more  FPL 2005»
16 years 9 days ago
Statistical Power Estimation for FPGA
This article presents a power estimation tool integrated with an FPGA design flow. It is able to estimate total and individual-node average power consumption for combinational blo...
Elias Todorovich, Fabian Angarita, Javier Valls, E...
FPL
2005
Springer
130views Hardware» more  FPL 2005»
16 years 9 days ago
Communication Synthesis in a multiprocessor environment
At Leiden University, we are developing a design methodology that allows for fast mapping of nested-loop applications (e.g. DSP, Imaging, or MultiMedia) written in a subset of Matl...
Claudiu Zissulescu, Bart Kienhuis, Ed F. Depretter...
142
Voted
HPCC
2005
Springer
16 years 9 days ago
A New Parity Space Approach to Fault Detection for General Systems
This paper proposes a new parity space approach to a fault detection for general systems with noises, actuator faults and sensor faults. The proposed parity space approach could be...
Pyung Soo Kim, Eung Hyuk Lee
PACT
2005
Springer
16 years 8 days ago
Information Flow Analysis for VHDL
We describe a fragment of the hardware description language VHDL that is suitable for implementing the Advanced Encryption Standard algorithm. We then define an Information Flow a...
Terkel K. Tolstrup, Flemming Nielson, Hanne Riis N...