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ISPAN
2005
IEEE
16 years 11 days ago
Dynamic Estimation of Task Level Parallelism with Operating System Support
The amount of Task Level Parallelism (TLP) in runtime workload is useful information to determine the efficient usage of multiprocessors. This paper presents mechanisms to dynami...
Luong Dinh Hung, Shuichi Sakai
MSS
2005
IEEE
133views Hardware» more  MSS 2005»
16 years 11 days ago
Exporting Storage Systems in a Scalable Manner with pNFS
To meet enterprise and grand challenge-scale performance and interoperability requirements, a group of engineers—initially ad-hoc but now integrated into the IETF—is designing...
Dean Hildebrand, Peter Honeyman
MSS
2005
IEEE
89views Hardware» more  MSS 2005»
16 years 11 days ago
A Hybrid Access Model for Storage Area Networks
We present HSAN - a hybrid storage area network, which uses both in-band (like NFS [13]) and out-of-band virtualization (like SAN FS [10]) access models. HSAN uses hybrid servers ...
Aameek Singh, Sandeep Gopisetty, Kaladhar Vorugant...
TPHOL
2005
IEEE
16 years 11 days ago
On the Correctness of Operating System Kernels
The Verisoft project aims at the pervasive formal verification of entire computer systems. In particular, the seamless verification of the academic system is attempted. This syst...
Mauro Gargano, Mark A. Hillebrand, Dirk Leinenbach...
VTS
2005
IEEE
89views Hardware» more  VTS 2005»
16 years 11 days ago
Synthesis of Low Power CED Circuits Based on Parity Codes
An automated design procedure is described for synthesizing circuits with low power concurrent error detection. It is based on pre-synthesis selection of a parity-check code follo...
Shalini Ghosh, Sugato Basu, Nur A. Touba