5762 search results - page 811 / 1153 » R-tree: A Hardware Implementation |
211
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IEEEPACT
2007
IEEE
16 years 1 months ago
2007
IEEE
Many sorting algorithms have been studied in the past, but there are only a few algorithms that can effectively exploit both SIMD instructions and threadlevel parallelism. In this...
139
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IEEEPACT
2007
IEEE
16 years 1 months ago
2007
IEEE
Performance auditing is an online optimization strategy that empirically measures the effectiveness of an optimization on a particular code region. It has the potential to greatly...
204
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IEEEPACT
2007
IEEE
16 years 1 months ago
2007
IEEE
The use of multi-core, multi-processor machines is opening new opportunities for software speculation, where program code is speculatively executed to improve performance at the a...
201
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IPPS
2007
IEEE
16 years 1 months ago
2007
IEEE
Hardware accelerators are increasingly used to extend the computational capabilities of baseline scalar processors to meet the growing performance and power requirements of embedd...
183
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IPPS
2007
IEEE
16 years 1 months ago
2007
IEEE
An innovative technique to model and simulate partial and dynamic reconfigurable processors is presented in this paper. The basis for development is a SystemC kernel modified for ...