5762 search results - page 763 / 1153 » R-tree: A Hardware Implementation |
153
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ISCAS
1999
IEEE
15 years 11 months ago
1999
IEEE
This paper describes the design of a low-voltage translinear second-order quadrature oscillator. The circuit is a direct implementation of a nonlinear second-order state-space desc...
189
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ISSS
1999
IEEE
15 years 11 months ago
1999
IEEE
The Motorola System on Chip Design Technologies (SoCDT) team aims at providing a system design environment for its customers. The Toulouse branch concentrates on design efforts in...
217
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MICRO
1999
IEEE
15 years 11 months ago
1999
IEEE
Current microprocessors incorporate techniques to exploit instruction-level parallelism (ILP). However, previous work has shown that these ILP techniques are less effective in rem...
165
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MICRO
1999
IEEE
15 years 11 months ago
1999
IEEE
The speculative multithreading paradigm (speculative threadlevel parallelism) is based on the concurrent execution of control-speculative threads. The efficiency of microarchitect...
173
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MICRO
1999
IEEE
15 years 11 months ago
1999
IEEE
Branch mispredictions are a major obstacle to exploiting instruction-level parallelism, at least in part because all instructions after a mispredicted branch are squashed. However...