5762 search results - page 759 / 1153 » R-tree: A Hardware Implementation |
178
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ASPDAC
2000
ACM
15 years 11 months ago
2000
ACM
Symbolic debuggers are system development tools that can accelerate the validation speed of behavioral specifications by allowing a user to interact with an executing code at the ...
166
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ASPDAC
2000
ACM
15 years 11 months ago
2000
ACM
- This paper presents a new aged timing simulation methodology that can be used for hot-carrier reliability assurance of VLSI. This methodology consists of a compact model and a un...
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ASPDAC
2000
ACM
15 years 11 months ago
2000
ACM
— We present the architecture of the ATM banyan switch composed of pattern process and high-speed digital neural cell scheduler. An input buffer type ATM switch with a window-bas...
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ISLPED
2000
ACM
15 years 11 months ago
2000
ACM
In this paper we present a completely on-chip voltage regulation technique which promises to adjust the degree of voltage regulation in a digital logic chip in the face of process...
180
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SC
2000
ACM
15 years 11 months ago
2000
ACM
We demonstrate that data reordering can substantially improve the performance of fine-grained irregular sharedmemory benchmarks, on both hardware and software shared-memory syste...