5762 search results - page 754 / 1153 » R-tree: A Hardware Implementation |
217
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FPL
2009
Springer
15 years 11 months ago
2009
Springer
Reconfigurable computing systems remain difficult to use and program. One way to increase design productivity for these systems is through reuse of previously developed and veri...
144
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FPL
2009
Springer
15 years 11 months ago
2009
Springer
This paper presents an FPGA-friendly approach to tracking elephant flows in network traffic. Our approach, Single Step Segmented Least Recently Used (S3 -LRU) policy, is a netwo...
167
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FPL
2009
Springer
15 years 11 months ago
2009
Springer
Field-programmable gate arrays are well-suited to DSP and digital communications applications. SRAM-based FPGAs, however, are susceptible to radiation-induced single-event upsets ...
167
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FPL
2009
Springer
15 years 11 months ago
2009
Springer
Automated code generation and performance tuning techniques for concurrent architectures such as GPUs, Cell and FPGAs can provide integer factor speedups over multi-core processor...
184
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CAV
2001
Springer
15 years 11 months ago
2001
Springer
In formal verification, we verify that a system is correct with respect to a specification. When verification succeeds and the system is proven to be correct, there is still a q...