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ISCA
2002
IEEE
95views Hardware» more  ISCA 2002»
15 years 12 months ago
An Instruction Set and Microarchitecture for Instruction Level Distributed Processing
An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...
Ho-Seop Kim, James E. Smith
ISCAS
2002
IEEE
201views Hardware» more  ISCAS 2002»
15 years 12 months ago
FGS+: optimizing the joint SNR-temporal video quality in MPEG-4 fine grained scalable coding
To enable video transmission over heterogeneous wireless networks, a highly scalable compression and streaming framework that can adapt to large and rapid bandwidth variations in ...
Raj Kumar Rajendran, Mihaela van der Schaar, Shih-...
ISCAS
2002
IEEE
108views Hardware» more  ISCAS 2002»
15 years 12 months ago
Optimal adaptive bandwidth monitoring for QoS based retrieval
—Network aware multimedia delivery applications are a class of applications that provide certain level of quality of service (QoS) guarantees to end users while not assuming unde...
Yinzhe Yu, Anup Basu, Irene Cheng
ISCAS
2002
IEEE
93views Hardware» more  ISCAS 2002»
15 years 12 months ago
Real-time streaming for the animation of talking faces in multiuser environments
In order to enable face animation on the Internet using high quality synthetic speech, the Text-to-Speech (TTS) servers need to be implemented on network-based servers and shared ...
Jörn Ostermann, Jürgen Rurainsky, M. Reh...
ISCAS
2002
IEEE
125views Hardware» more  ISCAS 2002»
15 years 12 months ago
Switching activity estimation of finite state machines for low power synthesis
A technique for computing the switching activity of synchronous Finite State Machine (FSM) implementations including the influence of temporal correlation among the next state si...
Mikael Kerttu, Per Lindgren, Mitchell A. Thornton,...