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PADS
2003
ACM
16 years 8 days ago
DVS: An Object-Oriented Framework for Distributed Verilog Simulation
There is a wide-spread usage of hardware design languages(HDL) to speed up the time-to-market for the design of modern digital systems. Verification engineers can simulate hardwa...
Lijun Li, Hai Huang, Carl Tropper
EUROCAST
2003
Springer
130views Hardware» more  EUROCAST 2003»
16 years 7 days ago
A Model of Neural Inspiration for Local Accumulative Computation
This paper explores the computational capacity of a novel local computational model that expands the conventional analogical and logical dynamic neural models, based on the charge ...
José Mira, Miguel Angel Fernández, M...
DATE
2010
IEEE
156views Hardware» more  DATE 2010»
16 years 3 days ago
Domain specific architecture for next generation wireless communication
—In order to solve the challenges in processor design for the next generation wireless communication systems, this paper first proposes a system level design flow for communicati...
Botao Zhang, Hengzhu Liu, Heng Zhao, Fangzheng Mo,...
DATE
2010
IEEE
134views Hardware» more  DATE 2010»
16 years 3 days ago
Simultaneous budget and buffer size computation for throughput-constrained task graphs
Abstract—Modern embedded multimedia systems process multiple concurrent streams of data processing jobs. Streams often have throughput requirements. These jobs are implemented on...
Maarten Wiggers, Marco Bekooij, Marc Geilen, Twan ...
DATE
2010
IEEE
109views Hardware» more  DATE 2010»
16 years 3 days ago
TIMBER: Time borrowing and error relaying for online timing error resilience
Increasing dynamic variability with technology scaling has made it essential to incorporate large design-time timing margins to ensure yield and reliable operation. Online techniq...
Mihir R. Choudhury, Vikas Chandra, Kartik Mohanram...