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2003
IEEE
73views Hardware» more  ASYNC 2003»
16 years 10 days ago
Self-Timed Ring for Globally-Asynchronous Locally-Synchronous Systems
The lack of proven mechanisms for transferring data between multiple synchronous islands has been a major impediment for applying globally asynchronous locally synchronous (GALS) ...
Thomas Villiger, Hubert Kaeslin, Frank K. Gür...
DATE
2003
IEEE
116views Hardware» more  DATE 2003»
16 years 10 days ago
Statistical Timing Analysis Using Bounds
The growing impact of within-die process variation has created the need for statistical timing analysis, where gate delays are modeled as random variables. Statistical timing anal...
Aseem Agarwal, David Blaauw, Vladimir Zolotov, Sar...
DATE
2003
IEEE
134views Hardware» more  DATE 2003»
16 years 10 days ago
A Multi-Level Design Flow for Incorporating IP Cores: Case Study of 1D Wavelet IP Integration
The design of high performance multimedia systems in a short time force us to use IP's blocks in many designs. However, their correct integration in a design implies more com...
Adel Baganne, Imed Bennour, Mehrez Elmarzougui, Ri...
DATE
2003
IEEE
112views Hardware» more  DATE 2003»
16 years 10 days ago
Automatic Generation of Simulation Monitors from Quantitative Constraint Formula
System design methodology is poised to become the next big enabler for highly sophisticated electronic products. Design verification continues to be a major challenge and simulat...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
DATE
2003
IEEE
109views Hardware» more  DATE 2003»
16 years 10 days ago
Run-Time Management of Logic Resources on Reconfigurable Systems
Dynamically reconfigurable systems based on partial and dynamically reconfigurable FPGAs may have their functionality partially modified at run-time without stopping the operation...
Manuel G. Gericota, Gustavo R. Alves, Miguel L. Si...