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ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
16 years 1 months ago
Interconnect-Aware Coherence Protocols for Chip Multiprocessors
Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future...
Liqun Cheng, Naveen Muralimanohar, Karthik Ramani,...
ISCA
2006
IEEE
121views Hardware» more  ISCA 2006»
16 years 1 months ago
Flexible Snooping: Adaptive Forwarding and Filtering of Snoops in Embedded-Ring Multiprocessors
A simple and low-cost approach to supporting snoopy cache coherence is to logically embed a unidirectional ring in the network of a multiprocessor, and use it to transfer snoop me...
Karin Strauss, Xiaowei Shen, Josep Torrellas
166
Voted
ISCAS
2006
IEEE
108views Hardware» more  ISCAS 2006»
16 years 1 months ago
An optimal normal basis elliptic curve cryptoprocessor for inductive RFID application
In this paper a 173-bit type II ONB ECC processor Section II introduces the mathematical backgrounds for for inductive RFID applications is described. Compared with curve operation...
Pak-Keung Leung, Oliver Chiu-sing Choy, Cheong-fat...
ISCAS
2006
IEEE
108views Hardware» more  ISCAS 2006»
16 years 1 months ago
DSP engine design for LINC wireless transmitter systems
—Linear amplification with nonlinear components (LINC) technique is a linearization technique for power amplifier designs. By using LINC, the nonlinear power amplifier with high ...
Kai-Yuan Jheng, Yi-Chiuan Wang, An-Yeu Wu, Hen-Wai...
215
Voted
ISQED
2006
IEEE
259views Hardware» more  ISQED 2006»
16 years 1 months ago
Impact of NBTI on SRAM Read Stability and Design for Reliability
— Negative Bias Temperature Instability (NBTI) has the potential to become one of the main show-stoppers of circuit reliability in nanometer scale devices due to its deleterious ...
Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatneka...