5762 search results - page 725 / 1153 » R-tree: A Hardware Implementation |
154
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FPL
2007
Springer
16 years 1 months ago
2007
Springer
The programmable clock networks in FPGAs have a significant impact on overall power, area, and delay. Not only does the clock network itself dissipate a significant amount of powe...
158
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FPL
2007
Springer
16 years 1 months ago
2007
Springer
In this paper, we present a shared instruction and data memory controller for the On-Chip Memory (OCM) bus of the PowerPC embedded in the Virtex-4 chip. The traditional design of ...
160
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3DPVT
2006
IEEE
16 years 1 months ago
2006
IEEE
Applications such as robot navigation and augmented reality require high-accuracy dense disparity maps in real-time and online. Due to time constraint, most realtime stereo applic...
148
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ACSD
2006
IEEE
16 years 1 months ago
2006
IEEE
We study the monitoring and fault-diagnosis problems for dense-time real-time systems, where observers (monitors and diagnosers) have access to digital rather than analog clocks. ...
158
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APCCAS
2006
IEEE
16 years 1 months ago
2006
IEEE
Abstract - This paper describes the design of a 12-bit digital-to-analog converter for a wireline modem chip implemented in a 0.13tm digital CMOS technology. Transistor-level simul...