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ICCAD
2007
IEEE
122views Hardware» more  ICCAD 2007»
16 years 4 months ago
Engineering change using spare cells with constant insertion
—In the VLSI design process, a design implementation often needs to be corrected because of new specifications or design constraint violations. This correction process is referre...
Yu-Min Kuo, Ya-Ting Chang, Shih-Chieh Chang, Malgo...
ICCAD
2007
IEEE
107views Hardware» more  ICCAD 2007»
16 years 4 months ago
Computation of minimal counterexamples by using black box techniques and symbolic methods
— Computing counterexamples is a crucial task for error diagnosis and debugging of sequential systems. If an implementation does not fulfill its specification, counterexamples ...
Tobias Nopper, Christoph Scholl, Bernd Becker
ICCAD
2007
IEEE
134views Hardware» more  ICCAD 2007»
16 years 4 months ago
Hybrid CEGAR: combining variable hiding and predicate abstraction
ion Chao Wang NEC Laboratories America Hyondeuk Kim University of Colorado Aarti Gupta NEC Laboratories America Variable hiding and predicate abstraction are two popular abstracti...
Chao Wang, Hyondeuk Kim, Aarti Gupta
ICCAD
2006
IEEE
141views Hardware» more  ICCAD 2006»
16 years 4 months ago
An accurate sparse matrix based framework for statistical static timing analysis
Statistical Static Timing Analysis has received wide attention recently and emerged as a viable technique for manufacturability analysis. To be useful, however, it is important th...
Anand Ramalingam, Gi-Joon Nam, Ashish Kumar Singh,...
ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
16 years 4 months ago
Fast wire length estimation by net bundling for block placement
The wire length estimation is the bottleneck of packing based block placers. To cope with this problem, we present a fast wire length estimation method in this paper. The key idea...
Tan Yan, Hiroshi Murata