5762 search results - page 699 / 1153 » R-tree: A Hardware Implementation |
217
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DAC
2006
ACM
16 years 8 months ago
2006
ACM
Scheduling plays a central role in the behavioral synthesis process, which automatically compiles high-level specifications into optimized hardware implementations. However, most ...
175
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DAC
2006
ACM
16 years 8 months ago
2006
ACM
Correctness is a paramount attribute of any microprocessor design; however, without novel technologies to tame the increasing complexity of design verification, the amount of bugs...
210
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CAV
2009
Springer
16 years 7 months ago
2009
Springer
Abstract. Pseudo-code descriptions of STMs assume sequentially consistent program execution and atomicity of high-level STM operations like read, write, and commit. These assumptio...
208
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CHI
2008
ACM
16 years 7 months ago
2008
ACM
In this paper, we introduce the change of a mobile phone's hardware shape as a means of tactile interaction. The alteration of shape is implemented in a hardware prototype us...
199
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VLSID
2006
IEEE
16 years 7 months ago
2006
IEEE
Performance of applications can be boosted by executing application-specific Instruction Set Extensions (ISEs) on a specialized hardware coupled with a processor core. Many commer...