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ICA3PP
2010
Springer
15 years 12 months ago
Accelerating Euler Equations Numerical Solver on Graphics Processing Units
Abstract. Finite volume numerical methods have been widely studied, implemented and parallelized on multiprocessor systems or on clusters. Modern graphics processing units (GPU) pr...
Pierre Kestener, Frédéric Chât...
ARITH
1999
IEEE
15 years 11 months ago
Reduced Latency IEEE Floating-Point Standard Adder Architectures
The design and implementation of a double precision floating-point IEEE-754 standard adder is described which uses "flagged prefix addition" to merge rounding with the s...
Andrew Beaumont-Smith, Neil Burgess, S. Lefrere, C...
ICRA
1998
IEEE
142views Robotics» more  ICRA 1998»
15 years 11 months ago
Lagrangian Relaxation Neural Networks for Job Shop Scheduling
Abstract--Manufacturing scheduling is an important but difficult task. In order to effectively solve such combinatorial optimization problems, this paper presents a novel Lagrangia...
Peter B. Luh, Xing Zhao, Yajun Wang
ICS
1993
Tsinghua U.
15 years 11 months ago
Anatomy of a Message in the Alewife Multiprocessor
Shared-memory provides a uniform and attractive mechanism for communication. For efficiency, it is often implemented with a layer of interpretive hardware on top of a message-pas...
John Kubiatowicz, Anant Agarwal
PPOPP
1993
ACM
15 years 11 months ago
Integrating Message-Passing and Shared-Memory: Early Experience
This paper discusses some of the issues involved in implementing a shared-address space programming model on large-scale, distributed-memory multiprocessors. While such a programm...
David A. Kranz, Kirk L. Johnson, Anant Agarwal, Jo...