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FCCM
2004
IEEE
118views VLSI» more  FCCM 2004»
15 years 11 months ago
Virtual Memory Window for a Portable Reconfigurable Cryptography Coprocessor
Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
CAV
2010
Springer
282views Hardware» more  CAV 2010»
15 years 11 months ago
A NuSMV Extension for Graded-CTL Model Checking
Graded-CTL is an extension of CTL with graded quantifiers which allow to reason about either at least or all but any number of possible futures. In this paper we show an extension...
Alessandro Ferrante, Maurizio Memoli, Margherita N...
WISA
2004
Springer
16 years 14 days ago
Hyperelliptic Curve Coprocessors on a FPGA
Abstract. Cryptographic algorithms are used in a large variety of different applications to ensure security services. It is, thus, very interesting to investigate various implement...
Howon Kim, Thomas J. Wollinger, YongJe Choi, Kyoil...
SPAA
1996
ACM
15 years 11 months ago
From AAPC Algorithms to High Performance Permutation Routing and Sorting
Several recent papers have proposed or analyzed optimal algorithms to route all-to-all personalizedcommunication (AAPC) over communication networks such as meshes, hypercubes and ...
Thomas Stricker, Jonathan C. Hardwick
VIS
2004
IEEE
134views Visualization» more  VIS 2004»
16 years 8 months ago
Projecting Tetrahedra without Rendering Artifacts
Hardware-accelerated direct volume rendering of unstructured volumetric meshes is often based on tetrahedral cell projection, in particular, the Projected Tetrahedra (PT) algorith...
David S. Ebert, Martin Kraus, Wei Qiao