5762 search results - page 660 / 1153 » R-tree: A Hardware Implementation |
208
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ISCAS
2006
IEEE
16 years 1 months ago
2006
IEEE
— This paper presents some circuitry for use within a visual-processing depth-recovery algorithm based upon spike timing. The accuracy of the depth calculation relies on a predic...
188
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ISCAS
2006
IEEE
16 years 1 months ago
2006
IEEE
— This paper proposes a new reconfigurable architecture for multi-media and wireless communications. The proposed architecture addresses three critical design issues with the loo...
149
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ISCAS
2006
IEEE
16 years 1 months ago
2006
IEEE
Abstract— This paper presents a new oversampling architecture for implementing phase-tracking loop that is commonly utilized for position sensors such that synchro, resolver, and...
168
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ISCAS
2006
IEEE
16 years 1 months ago
2006
IEEE
In this paper, we present analog VLSI implementation of a resonate-and-fire neuron (RFN) model, and then consider noise effects on its performance of signal detection. The RFN ci...
142
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ISCAS
2006
IEEE
16 years 1 months ago
2006
IEEE
— a form-preserving 2D z-domain helix transform is proposed for the synthesis of computable practical-BIBO stable 2D recursive filters computed over uniformly-spaced circular inp...