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CODES
2001
IEEE
15 years 11 months ago
Towards effective embedded processors in codesigns: customizable partitioned caches
This paper explores an application-specific customization technique for the data cache, one of the foremost area/power consuming and performance determining microarchitectural fea...
Peter Petrov, Alex Orailoglu
FPGA
2000
ACM
150views FPGA» more  FPGA 2000»
15 years 10 months ago
Programmable memory blocks supporting content-addressable memory
The Embedded System Block (ESB) of the APEX E programmable logic device family from Altera Corporation includes the capability of implementing content addressable memory (CAM) as ...
Frank Heile, Andrew Leaver, Kerry Veenstra
LCR
2000
Springer
172views System Software» more  LCR 2000»
15 years 10 months ago
Achieving Robust, Scalable Cluster I/O in Java
We present Tigris, a high-performance computation and I/O substrate for clusters of workstations that is implemented entirely in Java. Tigris automatically balances resource load a...
Matt Welsh, David E. Culler
ANCS
2008
ACM
15 years 9 months ago
Towards effective network algorithms on multi-core network processors
To build high-performance network devices with holistic security protection, a large number of algorithms have been proposed. However, multi-core implementation of the existing al...
Yaxuan Qi, Zongwei Zhou, Baohua Yang, Fei He, Yibo...
DAGSTUHL
2008
15 years 8 months ago
Interval Arithmetic Using SSE-2
ABSTRACT. We present an implementation of double precision interval arithmetic using the single-instruction-multiple-data SSE-2 instruction and register set extensions. The impleme...
Branimir Lambov