5762 search results - page 642 / 1153 » R-tree: A Hardware Implementation |
185
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WMPI
2004
ACM
16 years 19 days ago
2004
ACM
This paper discusses die cost vs. performance tradeoffs for a PIM system that could serve as the memory system of a host processor. For an increase of less than twice the cost of ...
200
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ATVA
2004
Springer
16 years 18 days ago
2004
Springer
Data races do not cover all kinds of concurrency errors. This paper presents a data- ow-based technique to nd stale-value errors, which are not found by low-level and high-level d...
194
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APCSAC
2003
IEEE
16 years 15 days ago
2003
IEEE
This paper discusses the use of signed-digit representations in the implementation of fast and efficient residue-arithmetic units. Improvements to existing signed-digit modulo adde...
191
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GLVLSI
2003
IEEE
16 years 15 days ago
2003
IEEE
Clock-delayed (CD) domino is a dynamic logic family developed to provide both inverting and non-inverting logic on single-rail gates. It is self-timed and can be easily pipelined ...
160
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IOLTS
2003
IEEE
16 years 15 days ago
2003
IEEE
In this paper we present a technique which allows to reduce the crosstalk-induced delay within busses implementing an error detecting/correcting code. This technique is based on t...