5762 search results - page 613 / 1153 » R-tree: A Hardware Implementation |
163
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ASPDAC
1999
ACM
15 years 11 months ago
1999
ACM
In this paper, we present a fast and efficient Iterative Improvement Partitioning (IIP) technique for VLSI circuits and hybrid bucket structures on its implementation. Due to thei...
240
Voted
ASPDAC
1999
ACM
15 years 11 months ago
1999
ACM
This paper presents a performance-driven I/O pin routing algorithm with special consideration of wire uniformity. First, a topological routing based on min-cost max-flow algorith...
198
Voted
DAC
1999
ACM
15 years 11 months ago
1999
ACM
This paper presents a design methodology, called common-case computation (CCC), and new design automation algorithms for optimizing power consumption or performance. The proposed ...
203
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ISPD
1999
ACM
15 years 11 months ago
1999
ACM
There is an increasing need in modern VLSI designs for circuits implemented in high-performance logic families such as Cascode Voltage Switch Logic, Pass Transistor Logic, and dom...
179
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ICCAD
1999
IEEE
15 years 11 months ago
1999
IEEE
We give the first study of copy detection techniques for VLSI CAD applications; these techniques are complementary to previous watermarking-based IP protection methods in finding ...