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192
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FPL
2000
Springer
128views Hardware» more  FPL 2000»
15 years 11 months ago
Verification of Dynamically Reconfigurable Logic
This paper reports on a method for extending existing VHDL design and verification software available for the Xilinx Virtex series of FPGAs. It allows the designer to apply standa...
David Robinson, Patrick Lysaght
ISCA
1998
IEEE
114views Hardware» more  ISCA 1998»
15 years 11 months ago
Tempest and Typhoon: User-Level Shared Memory
Future parallel computers must efficiently execute not only hand-coded applications but also programs written in high-level, parallel programming languages. Today's machines ...
Steven K. Reinhardt, James R. Larus, David A. Wood
217
Voted
EURODAC
1995
IEEE
202views VHDL» more  EURODAC 1995»
15 years 11 months ago
Hardware-software co-synthesis of fault-tolerant real-time distributed embedded systems
Distributed systems are becoming a popular way of implementing many embedded computing applications, automotive control being a common and important example. Such embedded systems...
Santhanam Srinivasan, Niraj K. Jha
ITC
1995
IEEE
122views Hardware» more  ITC 1995»
15 years 10 months ago
A Fault Model and a Test Method for Analog Fuzzy Logic Circuits
A nalog circuit implementations of fuzzy logic are characterized by performing logical connectives of analog signals. They can be considered as generalization of digital circuits ...
Stefan Weiner
199
Voted
NSDI
2008
15 years 9 months ago
Efficiency Through Eavesdropping: Link-layer Packet Caching
The broadcast nature of wireless networks is the source of both their utility and much of their complexity. To turn what would otherwise be unwanted interference into an advantage...
Mikhail Afanasyev, David G. Andersen, Alex C. Snoe...