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EGH
2005
Springer
16 years 26 days ago
KD-tree acceleration structures for a GPU raytracer
Modern graphics hardware architectures excel at compute-intensive tasks such as ray-triangle intersection, making them attractive target platforms for raytracing. To date, most GP...
Tim Foley, Jeremy Sugerman
FPGA
2004
ACM
174views FPGA» more  FPGA 2004»
16 years 21 days ago
A compiled accelerator for biological cell signaling simulations
The simulation of large systems of biochemical reactions is a key part of research into molecular signaling and information processing in biological cells. However, it can be impr...
John F. Keane, Christopher Bradley, Carl Ebeling
ISCAS
2003
IEEE
116views Hardware» more  ISCAS 2003»
16 years 18 days ago
Effective hardware-oriented technique for the rate control of JPEG2000 encoding
A great deal of computation for JPEG2000 encoding is a redundancy when the compression rate is high. That is because many coded bit-streams will be truncated after the rate contro...
Te-Hao Chang, Chung-Jr Lian, Hong-Hui Chen, Jing-Y...
ITC
2003
IEEE
148views Hardware» more  ITC 2003»
16 years 18 days ago
Linearity Testing of Precision Analog-to-Digital Converters Using Stationary Nonlinear Inputs
As the performance of Analog-to-Digital Converters continues to improve, it is becoming more challenging and costly to develop sufficiently fast and low-drift signal generators th...
Le Jin, Kumar L. Parthasarathy, Turker Kuyel, Dega...
VTS
2003
IEEE
95views Hardware» more  VTS 2003»
16 years 18 days ago
Built-In Reseeding for Serial Bist
Reseeding is used to improve fault coverage in pseudo-random testing. Most of the work done on reseeding is based on storing the seeds in an external tester. Besides its high cost...
Ahmad A. Al-Yamani, Edward J. McCluskey