The mapping of image processing algorithms to hardware is complicated by several hardware constraints including limited processing time, limited access to data and limited resourc...
K. T. Gribbon, Donald G. Bailey, Christopher T. Jo...
We present in this paper a unified paradigm for the verification and validation of software and systems engineering design models expressed in UML 2.0 or SysML. This paradigm reli...
A new large constraint length, soft decision viterbi decoder fabric is presented for deployment using platform based system on chip methodologies. The decoder can be reconfigured ...
This paper provides a realistic case study of using the previously introduced SIMPPL system architectural model, which fixes the physical interface and communication protocols bet...
In this paper, we o introduce the Reusable Embedded In-Circuit Emulator (EICE) and Reusable EICE development system. The main function in EICE we design are testing and debugging. ...