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DELTA
2006
IEEE
15 years 11 months ago
Using Design Patterns to Overcome Image Processing Constraints on FPGAs
The mapping of image processing algorithms to hardware is complicated by several hardware constraints including limited processing time, limited access to data and limited resourc...
K. T. Gribbon, Donald G. Bailey, Christopher T. Jo...
ECBS
2006
IEEE
153views Hardware» more  ECBS 2006»
15 years 11 months ago
A Unified Approach for Verification and Validation of Systems and Software Engineering Models
We present in this paper a unified paradigm for the verification and validation of software and systems engineering design models expressed in UML 2.0 or SysML. This paradigm reli...
Luay Alawneh, Mourad Debbabi, Yosr Jarraya, Andrei...
FPL
2006
Springer
129views Hardware» more  FPL 2006»
15 years 11 months ago
A Reconfigurable Viterbi Decoder for a Communication Platform
A new large constraint length, soft decision viterbi decoder fabric is presented for deployment using platform based system on chip methodologies. The decoder can be reconfigured ...
Imran Ahmed, Tughrul Arslan
FPL
2006
Springer
103views Hardware» more  FPL 2006»
15 years 11 months ago
A System Design Methodology for Reducing System Integration Time and Facilitating Modular Design Verification
This paper provides a realistic case study of using the previously introduced SIMPPL system architectural model, which fixes the physical interface and communication protocols bet...
Lesley Shannon, Blair Fort, Samir Parikh, Arun Pat...
ASPDAC
2001
ACM
82views Hardware» more  ASPDAC 2001»
15 years 11 months ago
Reusable embedded in-circuit emulator
In this paper, we o introduce the Reusable Embedded In-Circuit Emulator (EICE) and Reusable EICE development system. The main function in EICE we design are testing and debugging. ...
Ing-Jer Huang, Hsin-Ming Chen, Chung-Fu Kao