5762 search results - page 552 / 1153 » R-tree: A Hardware Implementation |
199
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ATS
2004
IEEE
15 years 11 months ago
2004
IEEE
TIS (Test Instruction Set) is an instruction level technique for CPU core self-testing. This method is based on enhancing a CPU instruction set with test instructions. TIS replace...
233
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ATVA
2006
Springer
15 years 11 months ago
2006
Springer
Abstract. Compositional reasoning aims to improve scalability of verification tools by reducing the original verification task into subproblems. The simplification is typically bas...
205
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ATVA
2006
Springer
15 years 11 months ago
2006
Springer
Motivated by recent applications of pushdown systems to computer security problems, we present an efficient algorithm for the reachability problem of alternating pushdown systems. ...
184
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CAV
2006
Springer
15 years 11 months ago
2006
Springer
We describe a formal verification of a recent concurrent list-based set algorithm due to Heller et al. The algorithm is optimistic: the add and remove operations traverse the list ...
167
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CAV
2006
Springer
15 years 11 months ago
2006
Springer
We show how to find and fix faults in Boolean programs by extending the program to a game. In the game, the protagonist can select an alternative implementation for an incorrect st...