5762 search results - page 415 / 1153 » R-tree: A Hardware Implementation |
159
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ICCAD
2006
IEEE
16 years 28 days ago
2006
IEEE
Designing asynchronous circuits by reusing existing synchronous tools has become a promising solution to the problem of poor CAD support in asynchronous world. A straightforward w...
169
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ASYNC
2005
IEEE
16 years 15 days ago
2005
IEEE
Networks on Chip that can guarantee Quality of Service (QNoC) are based on special routers that can support multiple service levels. GALS SoCs call for asynchronous NoC implementa...
249
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FPT
2005
IEEE
16 years 15 days ago
2005
IEEE
We describe a communication-centric design methodology with SystemC that allows for efficient FPGA prototype generation of transaction level models (TLM). Using a framework compr...
131
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ISCAS
2005
IEEE
16 years 14 days ago
2005
IEEE
— We extend a 3D differential-operator-based filter architecture to a 3D IIR FPGA filter circuit implementation employing a recently proposed scanned-array method, which uses a s...
169
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ISCAS
2005
IEEE
16 years 14 days ago
2005
IEEE
—We present a Built-In Self-Test (BIST) approach based on direct digital synthesizer (DDS) for functionality testing of analog circuitry in mixed-signal systems. DDS with Delta-S...