5762 search results - page 414 / 1153 » R-tree: A Hardware Implementation |
217
click to vote
DATE
2006
IEEE
16 years 28 days ago
2006
IEEE
This paper presents an Application Specific Instruction Set Processor (ASIP) design for the implementation of a class of nonlinear image processing algorithms, the Retinex-like fi...
161
click to vote
DATE
2006
IEEE
16 years 28 days ago
2006
IEEE
This paper presents the Block Processing Engine (BPE), an Application Specific Instruction-Set Processor (ASIP) explicitly designed for the implementation of multistandard wireles...
180
click to vote
DATE
2006
IEEE
16 years 28 days ago
2006
IEEE
As devices are scaled to the nanoscale regime, it is clear that future nanodevices will be plagued by higher soft error rates and reduced noise margins. Traditional implementation...
199
click to vote
ECBS
2006
IEEE
16 years 28 days ago
2006
IEEE
In this paper we argue for UML-based metamodeling and pattern-based graph transformation techniques in computer-based systems development through an illustrative example from the ...
171
click to vote
FCCM
2006
IEEE
16 years 28 days ago
2006
IEEE
Field programmable gate arrays (FPGAs), graphics processing units (GPUs) and Sony’s Playstation 2 vector units offer scope for hardware acceleration of applications. Implementin...