5762 search results - page 401 / 1153 » R-tree: A Hardware Implementation |
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DATE
1999
IEEE
15 years 11 months ago
1999
IEEE
In many algorithms, particularly those in the DSP domain, certain forms of symmetry can be observed. To efficiently implement such algorithms, it is often possible to exploit thes...
165
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EH
1999
IEEE
15 years 11 months ago
1999
IEEE
MorphoSys is a system-on-chip which combines a RISC processor with an array of reconfigurable cells. The important features of MorphoSys are coarse-grain granularity, dynamic reco...
151
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EUROMICRO
1999
IEEE
15 years 11 months ago
1999
IEEE
This paper describes the DELFT-JAVA processor and the mechanisms required to dynamically translate JVM instructions into DELFT-JAVA instructions. Using a form of hardware register...
172
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ISCA
1999
IEEE
15 years 11 months ago
1999
IEEE
Current techniques for prefetching linked data structures (LDS) exploit the work available in one loop iteration or recursive call to overlap pointer chasing latency. Jumppointers...
195
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ISCAS
1999
IEEE
15 years 11 months ago
1999
IEEE
In the design of low power systems, it is important to analyze and optimize both the hardware and the software component of the system. To evaluate the software component of the s...