5762 search results - page 392 / 1153 » R-tree: A Hardware Implementation |
141
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DAC
2001
ACM
16 years 7 months ago
2001
ACM
The interlock and forwarding logic is considered the tricky part of a fully-featured pipelined microprocessor and especially debugging these parts delays the hardware design proce...
140
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ICCD
2008
IEEE
16 years 3 months ago
2008
IEEE
—In this paper, a new FIR digital filter synthesis algorithm is proposed to consider multiple adder graphs for a coefficient. The proposed algorithm selects an adder graph that c...
171
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ICCD
2007
IEEE
16 years 3 months ago
2007
IEEE
This paper presents a methodology to generate a hierarchy of power models for power estimation of custom hardware IP blocks, enabling a trade-off between power estimation accuracy...
174
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ICCD
2003
IEEE
16 years 3 months ago
2003
IEEE
We analyze the effect of errors in branch predictors, a representative example of speculative processor subsystems, to motivate the necessity for fault tolerance in such subsystem...
175
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ICCAD
2006
IEEE
16 years 3 months ago
2006
IEEE
Energy-efficiency and power-awareness for electronic systems have been important design issues in hardware and software implementations. We consider the scheduling of periodic ha...