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DATE
2004
IEEE
108views Hardware» more  DATE 2004»
15 years 10 months ago
Poor Man's TBR: A Simple Model Reduction Scheme
This paper presents a model reduction algorithm motivated by a connection between frequency domain projection methods and approximation of truncated balanced realizations. The met...
Joel R. Phillips, Luis Miguel Silveira
FPL
2004
Springer
87views Hardware» more  FPL 2004»
15 years 10 months ago
A Dynamic NoC Approach for Communication in Reconfigurable Devices
A concept for solving the communication problem among modules dynamically placed on a reconfigurable device is presented. Based on a dynamic network-on-chip (DyNoC) communication i...
Christophe Bobda, Mateusz Majer, Dirk Koch, Ali Ah...
FPL
2006
Springer
129views Hardware» more  FPL 2006»
15 years 10 months ago
Architecture Exploration and Tools for Pipelined Coarse-Grained Reconfigurable Arrays
We present a heavily parametrized tool suite that allows the modeling and exploration of heterogeneous, coarse-grained, heavily pipelined reconfigurable architectures. Our tools p...
Florian Stock, Andreas Koch
ACSD
2001
IEEE
102views Hardware» more  ACSD 2001»
15 years 10 months ago
Exploration Testing
This paper describes a new way of testing reactive systems as investigated by the RATE-project at the Tampere University of Technology. We abandon the idea of systematically using...
Juhana Helovuo, Sari Leppänen
ACSD
2001
IEEE
121views Hardware» more  ACSD 2001»
15 years 10 months ago
A structural encoding technique for the synthesis of asynchronous circuits
This paper presents a method for the automatic synthesis of asynchronous circuits from Petri net specifications. The method is based on a structural encoding of the system in such ...
Josep Carmona, Jordi Cortadella, Enric Pastor