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ICCAD
1994
IEEE
82views Hardware» more  ICCAD 1994»
15 years 11 months ago
A timing analysis algorithm for circuits with level-sensitive latches
For a logic design with level-sensitive latches, we need to validate timing signal paths which may flush through several latches. We developed efficient algorithms based on the mo...
Jin-fuw Lee, Donald T. Tang, C. K. Wong
MICRO
1993
IEEE
97views Hardware» more  MICRO 1993»
15 years 11 months ago
Register renaming and dynamic speculation: an alternative approach
In this paper, we present a novel mechanism that implements register renaming, dynamic speculation and precise interrupts. Renaming of registers is performed during the instructio...
Mayan Moudgill, Keshav Pingali, Stamatis Vassiliad...
CAV
1993
Springer
127views Hardware» more  CAV 1993»
15 years 11 months ago
Symbolic Equivalence Checking
Abstract. We describe the implementation, within ALDEBARAN of an algorithmic method allowing the generation of a minimal labeled transition rom an abstract model ; this minimality ...
Jean-Claude Fernandez, Alain Kerbrat, Laurent Moun...
ASPDAC
2007
ACM
115views Hardware» more  ASPDAC 2007»
15 years 10 months ago
Model-based Programming Environment of Embedded Software for MPSoC
- A noble model-based programming environment of embedded software for MPSoC is proposed. By defining a common intermediate code (CIC), it separates modeling of the software and im...
Soonhoi Ha
ASPDAC
2007
ACM
114views Hardware» more  ASPDAC 2007»
15 years 10 months ago
Approaching Speed-of-light Distortionless Communication for On-chip Interconnect
We extend the Surfliner on-chip distortionless transmission line scheme and provide more details for the implementation issues. Surfliner seeks to approach distortionless transmiss...
Haikun Zhu, Rui Shi, Chung-Kuan Cheng, Hongyu Chen