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ICES
1998
Springer
131views Hardware» more  ICES 1998»
15 years 11 months ago
Aspects of Digital Evolution: Geometry and Learning
In this paper we present a new chromosome representation for evolving digital circuits. The representation is based very closely on the chip architecture of the Xilinx 6216 FPGA. W...
Julian F. Miller, Peter Thomson
DATE
1997
IEEE
80views Hardware» more  DATE 1997»
15 years 11 months ago
Hybrid symbolic-explicit techniques for the graph coloring problem
This paper presents an algorithmic technique based on hybridizing Symbolic Manipulation Techniques based on BDDs with more traditional Explicit solving algorithms. To validate the...
Silvia Chiusano, Fulvio Corno, Paolo Prinetto, Mat...
VTS
1997
IEEE
133views Hardware» more  VTS 1997»
15 years 11 months ago
ATPG for scan chain latches and flip-flops
A new approach for testing the bistable elements (latches and flip-flops) in scan chain circuits is presented. In this approach, we generate test patterns that apply a checking ex...
Samy Makar, Edward J. McCluskey
ICCAD
1996
IEEE
106views Hardware» more  ICCAD 1996»
15 years 11 months ago
Heterogeneous built-in resiliency of application specific programmable processors
Abstract - Using the exibility provided by multiple functionalities we have developed a new approach for permanent fault-tolerance: Heterogeneous BuiltIn-Resiliency (HBIR). HBIR p...
Kyosun Kim, Ramesh Karri, Miodrag Potkonjak
ICCAD
1996
IEEE
129views Hardware» more  ICCAD 1996»
15 years 11 months ago
Accurate interconnect modeling: towards multi-million transistor chips as microwave circuits
-- In this tutorial we discuss concepts and techniques for the accurate and efficient modeling and extraction of interconnect parasitics in VLSI designs. Due toincreasing operating...
N. P. van der Meijs, T. Smedes