5762 search results - page 364 / 1153 » R-tree: A Hardware Implementation |
167
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AHS
2007
IEEE
16 years 1 months ago
2007
IEEE
This paper describes a new FPGA implementation of a system for evolutionary image filter design. Three parallel search algorithms are compared. An optimal mutation rate and the q...
162
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DATE
2007
IEEE
16 years 1 months ago
2007
IEEE
1 This paper presents a BIST strategy for testing the NoC interconnect network, and investigates if the strategy is a suitable approach for the task. All switches and links in the ...
129
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ISCAS
2007
IEEE
16 years 1 months ago
2007
IEEE
— Sphere decoding enables maximum likelihood (ML) detection with lower complexity than other decoding algorithms, but it still suffers from large computational delay. This paper ...
166
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ISCAS
2007
IEEE
16 years 1 months ago
2007
IEEE
—A Built-In Self-Test (BIST) approach for functionality measurements, including noise figure (NF), linearity and frequency response of analog circuitry in mixedsignal systems, is...
156
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ARC
2007
Springer
16 years 1 months ago
2007
Springer
Abstract. Encryption of volatile FPGA bitstreams provides confidentiality to the design but does not ensure its authenticity. This paper motivates the need for adding authenticati...