5762 search results - page 331 / 1153 » R-tree: A Hardware Implementation |
142
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DAC
2007
ACM
16 years 7 months ago
2007
ACM
We present and evaluate a novel switching mechanism called layered switching. Conceptually, the layered switching implements wormhole on top of virtual cut-through switching. To s...
175
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ICCD
2008
IEEE
16 years 3 months ago
2008
IEEE
— The need for efficient implementation of simple crossbar schedulers has increased in the recent years due to the advent of on-chip interconnection networks that require low la...
160
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
Scan compression has emerged as the most successful solution to solve the problem of rising manufacturing test cost. Compression technology is not hierarchical in nature. Hierarch...
159
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ISCAS
2008
IEEE
16 years 1 months ago
2008
IEEE
— A fully differential translinear 3-phase sinusoidal oscillator architecture is presented. The architecture is meant for BiCMOS implementation and uses only NPN devices, typical...
164
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ASAP
2006
IEEE
16 years 25 days ago
2006
IEEE
In this paper, we analyze the theoretical delay bound of the SHA-1 algorithm and propose architectures to achieve high throughput hardware implementations which approach this boun...