5762 search results - page 320 / 1153 » R-tree: A Hardware Implementation |
154
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DATE
2003
IEEE
16 years 1 days ago
2003
IEEE
In this paper, we show the necessity of reconfigurable hardware for data and signal processing in wireless mobile terminals. We first identify the key processing power requirement...
193
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ISMVL
2009
IEEE
16 years 1 months ago
2009
IEEE
We show the advantage of Quarternary Decision Diagrams (QDDs) in representing and evaluating logic functions. That is, we show how QDDs are used to implement QDD machines, which y...
142
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FCCM
2008
IEEE
16 years 1 months ago
2008
IEEE
We present an AES cipher implementation that is based on the BlockRAM and DSP units embedded within Xilinx’s Virtex-5 FPGAs. An iterative “basic” module outputs a 32 bit col...
151
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IOLTS
2007
IEEE
16 years 1 months ago
2007
IEEE
Security of cryptographic circuits is a major concern. Fault attacks are a mean to obtain critical information with the use of physical disturbance and cryptanalysis. We propose a...
147
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ISCAS
2006
IEEE
16 years 23 days ago
2006
IEEE
Abstract— Although many researchers are investigating techniques to synthesize reversible combinational logic, there is little work in the area of sequential reversible logic. We...