5762 search results - page 318 / 1153 » R-tree: A Hardware Implementation |
171
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ICCD
2008
IEEE
16 years 3 months ago
2008
IEEE
High associativity is important for level-two cache designs [9]. Implementing CAM-based Highly Associative Caches (CAM-HAC), however, is both costly in hardware and exhibits poor s...
194
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ASAP
2008
IEEE
16 years 1 months ago
2008
IEEE
Many complex systems require the use of floating point arithmetic that is exceedingly time consuming to perform on personal computers. However, floating point operators are also h...
169
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DSD
2008
IEEE
16 years 1 months ago
2008
IEEE
In this paper, we examine the digital hardware design and implementation of a novel compact block cipher, referred to as PUFFIN, that is suitable for embedded applications. An imp...
165
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DSD
2008
IEEE
16 years 1 months ago
2008
IEEE
Systems on chip (SoC) have much in common with traditional (networked) distributed systems in that they consist of largely independent components with dedicated communication inte...
151
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ISCA
2006
IEEE
16 years 23 days ago
2006
IEEE
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...