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DATE
2005
IEEE
154views Hardware» more  DATE 2005»
16 years 10 days ago
A Time Slice Based Scheduler Model for System Level Design
Efficient evaluation of design choices, in terms of selection of algorithms to be implemented as hardware or software, and finding an optimal hw/sw design mix is an important re...
Luciano Lavagno, Claudio Passerone, Vishal Shah, Y...
EH
2005
IEEE
134views Hardware» more  EH 2005»
16 years 10 days ago
Complexity Metrics for Self-monitoring Impact Sensing Networks
In this paper we describe novel metrics measuring complexity in self-organising networks. The metrics are investigated within the context of decentralised inspections, developed a...
Mikhail Prokopenko, Peter Wang, Don Price
CARDIS
2004
Springer
216views Hardware» more  CARDIS 2004»
16 years 4 days ago
Differential Fault Analysis Attack Resistant Architectures for the Advanced Encryption Standard
: We present two architectures for protecting a hardware implementation of AES against side-channel attacks known as Differential Fault Analysis attacks. The first architecture, wh...
Mark G. Karpovsky, Konrad J. Kulikowski, Alexander...
EUROPAR
2004
Springer
16 years 3 days ago
A Data Structure Oriented Monitoring Environment for Fortran OpenMP Programs
This paper describes a monitoring environment that enables the analysis of memory access behavior of applications in a selective way with a potentially very high degree of detail. ...
Edmond Kereku, Tianchao Li, Michael Gerndt, Josef ...
DSD
2003
IEEE
97views Hardware» more  DSD 2003»
16 years 22 hour ago
A Quadruple Precision and Dual Double Precision Floating-Point Multiplier
Double precision floating-point arithmetic is inadequate for many scientific computations. This paper presents the design of a quadruple precision floating-point multiplier tha...
Ahmet Akkas, Michael J. Schulte