Sciweavers

5762 search results - page 304 / 1153
» R-tree: A Hardware Implementation
Sort
View
HPCA
1995
IEEE
15 years 10 months ago
Software Cache Coherence for Large Scale Multiprocessors
Shared memory is an appealing abstraction for parallel programming. It must be implemented with caches in order toperform well, however, and caches require a coherence mechanism t...
Leonidas I. Kontothanassis, Michael L. Scott
FPL
2005
Springer
122views Hardware» more  FPL 2005»
16 years 7 days ago
FPGA-Aware Garbage Collection in Java
— During codesign of a system, one still runs into the impedance mismatch between the software and hardware worlds. er identifies the different levels of abstraction of hardware...
Philippe Faes, Mark Christiaens, Dries Buytaert, D...
MAM
2002
110views more  MAM 2002»
15 years 6 months ago
Architecture of a fieldbus message scheduler coprocessor based on the planning paradigm
The use of a centralised planning scheduler in fieldbus-based systems requiring real-time operation has proved to be a good compromise between operational flexibility and timeline...
Ernesto Martins, Paulo A. C. S. Neves, José...
PVLDB
2010
122views more  PVLDB 2010»
15 years 5 months ago
From a Stream of Relational Queries to Distributed Stream Processing
Applications from several domains are now being written to process live data originating from hardware and softwarebased streaming sources. Many of these applications have been wr...
Qiong Zou, Huayong Wang, Robert Soulé, Mart...
VLDB
2010
ACM
144views Database» more  VLDB 2010»
15 years 5 months ago
Methods for finding frequent items in data streams
The frequent items problem is to process a stream of items and find all items occurring more than a given fraction of the time. It is one of the most heavily studied problems in d...
Graham Cormode, Marios Hadjieleftheriou