Hardware-timestamping is essential for achieving tight synchronization in networking applications. This mechanism is selectively used on few high-cost tailored systems. Actual μP...
This paper presents a single chip implementation of a space-time algorithm for co-channel interference (CCI) and intersymbol interference (ISI) reduction in GSM/DCS systems. The t...
This paper presents a methodology to retarget the technique of compiled simulation for Digital Signal Processors DSPs using the modeling language LISA. In the past, the principl...
Testing of high performance integrated circuits is becoming increasingly a challenging task owing to high clock frequencies. Often testers are not able to test such devices due to...
Hans G. Kerkhoff, Mansour Shashaani, Manoj Sachdev
A new high-speed Domino circuit, called HS-Domino is developed. HS-Domino resolves the trade-o between performance and noise margins in conventional CD-Domino logic while dissipat...